---
product_id: 52044741
title: "The RISC-V Reader: An Open Architecture Atlas"
price: "NZ$82"
currency: NZD
in_stock: true
reviews_count: 11
url: https://www.desertcart.nz/products/52044741-the-risc-v-reader-an-open-architecture-atlas
store_origin: NZ
region: New Zealand
---

# The RISC-V Reader: An Open Architecture Atlas

**Price:** NZ$82
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- **What is this?** The RISC-V Reader: An Open Architecture Atlas
- **How much does it cost?** NZ$82 with free shipping
- **Is it available?** Yes, in stock and ready to ship
- **Where can I buy it?** [www.desertcart.nz](https://www.desertcart.nz/products/52044741-the-risc-v-reader-an-open-architecture-atlas)

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## Description

The RISC-V Reader is a concise introduction and reference for embedded systems programmers, students, and the curious to a modern, popular, open architecture. RISC-V spans from the cheapest 32-bit embedded microcontroller to the fastest 64-bit cloud computer. The text shows how RISC-V followed the good ideas of past architectures while avoiding their mistake. Highlights include: Introduces the RISC-V instruction set in only 100 pages, including 75 figures An Instruction Translator Guide to help translate assembly language programs from ARM-32 and x86-32 instruction sets to RISC-V 2-page RISC-V Reference Card that summarizes all instructions 50-page Instruction Glossary that defines every instruction in detail 75 spotlights of good architecture design using margin icons 50 sidebars with interesting commentary and RISC-V history 25 quotes to pass along wisdom of noted scientists and engineers Ten chapters introduce each component of the modular RISC-V instruction set--often contrasting code compiled from C to RISC-V versus the older ARM, Intel, and MIPS architectures--but readers can start programming after Chapter 2. Praise for The RISC-V Reader: “This timely book concisely describes the simple, free and open RISC-V ISA that is experiencing rapid uptake in many different computing sectors.” Krste Asanovic, University of California, Berkeley, one of the four architects of RISC-V “I like RISC-V and this book as they are elegant—brief, to the point, and complete.” C. Gordon Bell, a computer architecture pioneer “ This handy little book effortlessly summarizes all the essential elements of the RISC-V Instruction Set Architecture, a perfect reference guide for students and practitioners alike.” Professor Randy Katz, University of California, Berkeley, one of the inventors of RAID storage systems “This clearly-written book offers a good introduction to RISC-V, augmented with insightful comments on its evolutionary history and comparisons with other familiar architectures.” John Mashey, one of the designers of the MIPS architecture “This book tells what RISC-V can do and why its designers chose to endow it with those abilities.” Ivan Sutherland, the father of computer graphics “RISC-V will change the world, and this book will help you become part of that change.” Professor Michael B. Taylor, University of Washington “This book will be an invaluable reference for anyone working with the RISC-V ISA.” Megan Wachs, PhD, SiFive Engineer

Review: Essential reading and reference for the new-to-Risc-V world. - This book introduces and covers the RISC-V instruction set architecture in a comprehensive way. Regular comparisons are made with several ARM and x86 processor types. Many very useful program coding examples are provided. Plenty of architecture discussions such as how the RISC-V delivers shorter code sequences than ARM or x86 yet has less hardware to implement into CPU logic. Many advanced features explained. A comprehensive and useful 45 page listing of the instructions is provided. In total 180 pages of excellent RISC-V technical details.
Review: Tremendous resource to have - This book is excellent if you're going to be doing anything in RISC-V assembly. Personally, I used it as a reference and to learn more about the design choices which were made when RISC-V was being developed. I left with a much greater appreciation of the elegance and careful design in the ISA. Note that if you're looking for an entry-level introduction to basic assembly concepts, you might struggle with this book a little. But if you've had some limited exposure to assembly before (for any architecture) you'll steam through the book.

## Technical Specifications

| Specification | Value |
|---------------|-------|
| Best Sellers Rank | 580,696 in Books ( See Top 100 in Books ) 676 in Computer Hardware (Books) |
| Customer Reviews | 4.6 out of 5 stars 159 Reviews |

## Images

![The RISC-V Reader: An Open Architecture Atlas - Image 1](https://m.media-amazon.com/images/I/51MWsWqjxFL.jpg)

## Customer Reviews

### ⭐⭐⭐⭐⭐ Essential reading and reference for the new-to-Risc-V world.
*by N***Y on 26 December 2022*

This book introduces and covers the RISC-V instruction set architecture in a comprehensive way. Regular comparisons are made with several ARM and x86 processor types. Many very useful program coding examples are provided. Plenty of architecture discussions such as how the RISC-V delivers shorter code sequences than ARM or x86 yet has less hardware to implement into CPU logic. Many advanced features explained. A comprehensive and useful 45 page listing of the instructions is provided. In total 180 pages of excellent RISC-V technical details.

### ⭐⭐⭐⭐⭐ Tremendous resource to have
*by A***S on 22 April 2019*

This book is excellent if you're going to be doing anything in RISC-V assembly. Personally, I used it as a reference and to learn more about the design choices which were made when RISC-V was being developed. I left with a much greater appreciation of the elegance and careful design in the ISA. Note that if you're looking for an entry-level introduction to basic assembly concepts, you might struggle with this book a little. But if you've had some limited exposure to assembly before (for any architecture) you'll steam through the book.

### ⭐⭐⭐⭐ Good overview — for 2017
*by I***A on 7 January 2026*

Interesting overview! Good overview of motivations, design approaches / philosophy, various available extensions, etc. As a software guy with limited ‘digital logic’ experience (VHDL courses in university and limited exposure to Verilog), I have approached the book with interest in organization of core RISC-V instruction set, naming conventions for extensions, basic approach to assembly, and potentially the ideas behind communications with ‘peripherals’ (memory, buses, etc) and less design of the cores. Organization of the book seems good as a reference, which is nice. There’s an overview of instructions, machine code representation, and the organization of the book is grouped by sets of instructions / extensions. Not important and thus doesn’t influence my impression, but there is something slightly off about the visual design — but nothing I can exactly point at and not crucial. One star goes off for nothing that’s the fault of the book, and one thing only: this is a 2017 title, and therefore a major reason why I was curious about RISC-V — vector extensions / RVV — couldn’t be covered because they didn’t exist yet. Since as of late 2025 RISC-V has been improving in important ways over the last few years, with usable products slowly appearing (dev products like Framework Laptop 13-sized mainboard, interesting products like Vega switch, etc), you may need an overview newer than this particular, well written book, which would teach you about important newer extensions that your physical hardware supports (or which it might not support, and you might want to find or produce core designs that do, as is the case with myself and RVV1.0 not being supported on 1st gen DC-ROMA board for Framework Laptop 13).

## Frequently Bought Together

- The RISC-V Reader: An Open Architecture Atlas
- RISC-V Assembly Language
- Computer Organization and Design RISC-V Edition: The Hardware Software Interface (The Morgan Kaufmann Series in Computer Architecture and Design)

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*Product available on Desertcart New Zealand*
*Store origin: NZ*
*Last updated: 2026-06-04*